High Speed Digital Hardware Design Engineer
| Dyddiad hysbysebu: | 10 Rhagfyr 2025 |
|---|---|
| Cyflog: | £45,000 i £80,000 bob blwyddyn |
| Gwybodaeth ychwanegol am y cyflog: | None |
| Oriau: | Llawn Amser |
| Dyddiad cau: | 09 Ionawr 2026 |
| Lleoliad: | London, W6 9LU |
| Gweithio o bell: | Ar y safle yn unig |
| Cwmni: | Expert Employment |
| Math o swydd: | Parhaol |
| Cyfeirnod swydd: | 1064 |
Crynodeb
Hardware Design Engineer to work on cutting edge memory controllers, bus controllers and associated digital circuit design.
Key technologies
High density or multi-layer PCB design and debug
SRAM memory: QDR, DDR etc
PCI-Express
10G Ethernet
Infiniband
FPGA / VHDL
This is a fantastic opportunity to work on truly cutting edge high speed IP creation, desgn and delivery.