Research Fellow
| Dyddiad hysbysebu: | 29 Mai 2025 |
|---|---|
| Cyflog: | £35,116.00 i £45,413.00 bob blwyddyn |
| Oriau: | Llawn Amser |
| Dyddiad cau: | 26 Mehefin 2025 |
| Lleoliad: | Warwick, Warwickshire |
| Gweithio o bell: | Ar y safle yn unig |
| Cwmni: | University of Warwick |
| Math o swydd: | Dros dro |
| Cyfeirnod swydd: | 110539-0525 |
Crynodeb
For informal enquiries, please contact Marina Antoniou (Associate Professor – Reader) Marina.antoniou@warwick.ac.uk
We will consider applications for employment on a part-time or other flexible working basis, even where a position is advertised as full-time, unless there are operational or other objective reasons why it is not possible to do so.
This is a full time, fixed term post ending no later than 31st August 2027.
The School of Engineering is seeking a Research Fellow to assist the Principal Investigator (Dr Marina Antoniou) and the project collaborators in the successful execution of the project. The aim of the project is the device design and fabrication for SiC superjunction structures and devices.
You will play a major leading role in this project, and in the many other projects of the group, particularly developing semiconductor fabrication techniques, TCAD based device design and modelling. You will help to manage the activities at Warwick, working as part of a small team including three academics specialising in material growth, SiC device design and fabrication whilst mentoring a new PhD student on this same project. You will also be responsible for communicating with and managing work from the project partners, who are CNR Italy, MQSemi Switzerland, University of Nottingham, University of Naples, University of Kyoto and Hitachi Energy all leaders in their own specialist fields.
The main objective of the project is to demonstrate cost effective, breakthrough concepts of power semiconductor devices enabled by the development of a novel platform technology of high energy efficiency SiC-MOSFETs. The SJ layers will help to increase the devices channel densities (decreasing the cell size). Moreover, the attempt to combine the SJ and the innovative source side design concepts, makes this project highly ambitious on its objectives with the expected result being a radical device platform for 3.3kV and above rated devices. You will design experiments and perform them using laboratories and TCAD servers in Warwick and elsewhere.
You will be expected to write up research for publication. You will be expected to deal with any management/ administration problems that may arise.
This post is based at the University of Warwick. The successful candidate will be required to make occasional trips to collaborators/ specialist research facilities, so the willingness to travel occasionally is required. There will be opportunities for presenting work at international conferences.
You will have a PhD or equivalent (or nearing completion) in a relevant discipline (including a relevant branch of Materials Science/ Physics/ Electrical Engineering).
You will have good knowledge of Power Electronics and Devices, including TCAD semiconductor simulations experience.
The ideal candidate will have strong communication skills including the ability to communicate effectively in English, both verbally and in writing.
You will also have demonstrable ability to work collaboratively and effectively with academic and administrative colleagues, both within and outside the University, to promote a collegial environment, while contributing to the life and community of the School through various duties, such as supporting offer holder days and outreach activities, which may occasionally require weekend work.
You must have a strong record of publications and research outputs in the Power Electronics and Devices field and the ability to contribute to the development of funding proposals.
You will have good IT skills including Microsoft Office and proven ability to use IT to write technical research papers and presentations.
It is desirable that you have an ability to teach, train and mentor junior researchers.
For further information regarding the skills required for this role please see the personal specification section of the attached job description.
If you are near submission or have recently submitted your PhD but have not yet had it conferred, any offers of employment will be made as Research Assistant at the top of level 5 of the University grade structure. Upon receipt of evidence of the successful award of your PhD, you will be promoted to Research Fellow on the first point of level 6 of the University grade structure.
For further information regarding the skills required for this role please see the personal specification section of the attached job description.
We will consider applications for employment on a part-time or other flexible working basis, even where a position is advertised as full-time, unless there are operational or other objective reasons why it is not possible to do so.
This is a full time, fixed term post ending no later than 31st August 2027.
The School of Engineering is seeking a Research Fellow to assist the Principal Investigator (Dr Marina Antoniou) and the project collaborators in the successful execution of the project. The aim of the project is the device design and fabrication for SiC superjunction structures and devices.
You will play a major leading role in this project, and in the many other projects of the group, particularly developing semiconductor fabrication techniques, TCAD based device design and modelling. You will help to manage the activities at Warwick, working as part of a small team including three academics specialising in material growth, SiC device design and fabrication whilst mentoring a new PhD student on this same project. You will also be responsible for communicating with and managing work from the project partners, who are CNR Italy, MQSemi Switzerland, University of Nottingham, University of Naples, University of Kyoto and Hitachi Energy all leaders in their own specialist fields.
The main objective of the project is to demonstrate cost effective, breakthrough concepts of power semiconductor devices enabled by the development of a novel platform technology of high energy efficiency SiC-MOSFETs. The SJ layers will help to increase the devices channel densities (decreasing the cell size). Moreover, the attempt to combine the SJ and the innovative source side design concepts, makes this project highly ambitious on its objectives with the expected result being a radical device platform for 3.3kV and above rated devices. You will design experiments and perform them using laboratories and TCAD servers in Warwick and elsewhere.
You will be expected to write up research for publication. You will be expected to deal with any management/ administration problems that may arise.
This post is based at the University of Warwick. The successful candidate will be required to make occasional trips to collaborators/ specialist research facilities, so the willingness to travel occasionally is required. There will be opportunities for presenting work at international conferences.
You will have a PhD or equivalent (or nearing completion) in a relevant discipline (including a relevant branch of Materials Science/ Physics/ Electrical Engineering).
You will have good knowledge of Power Electronics and Devices, including TCAD semiconductor simulations experience.
The ideal candidate will have strong communication skills including the ability to communicate effectively in English, both verbally and in writing.
You will also have demonstrable ability to work collaboratively and effectively with academic and administrative colleagues, both within and outside the University, to promote a collegial environment, while contributing to the life and community of the School through various duties, such as supporting offer holder days and outreach activities, which may occasionally require weekend work.
You must have a strong record of publications and research outputs in the Power Electronics and Devices field and the ability to contribute to the development of funding proposals.
You will have good IT skills including Microsoft Office and proven ability to use IT to write technical research papers and presentations.
It is desirable that you have an ability to teach, train and mentor junior researchers.
For further information regarding the skills required for this role please see the personal specification section of the attached job description.
If you are near submission or have recently submitted your PhD but have not yet had it conferred, any offers of employment will be made as Research Assistant at the top of level 5 of the University grade structure. Upon receipt of evidence of the successful award of your PhD, you will be promoted to Research Fellow on the first point of level 6 of the University grade structure.
For further information regarding the skills required for this role please see the personal specification section of the attached job description.