Principal FPGA Design Engineer
| Dyddiad hysbysebu: | 11 Chwefror 2025 |
|---|---|
| Cyflog: | £53,000 i £85,000 bob blwyddyn |
| Gwybodaeth ychwanegol am y cyflog: | None |
| Oriau: | Llawn Amser |
| Dyddiad cau: | 13 Mawrth 2025 |
| Lleoliad: | Dursley, GL11 4PB |
| Gweithio o bell: | Ar y safle yn unig |
| Cwmni: | Expert Employment |
| Math o swydd: | Parhaol |
| Cyfeirnod swydd: | 2709 |
Crynodeb
FPGA Design Engineer required Senior to Principal level required to join a successful
circuit design team on the design and development of high performance products. You will focus on digital logic design for FPGAs calling on your solid fundamental understanding of analogue and digital high speed design.
Requirements
VHDL, commercial experience on Altera FPGAs.
High speed and low power circuit design.
Altium, CR5000, or similar ECAD tool experience.
Understanding of microcontrollers, embedded software, and signal processing techniques.
Embedded C, C++ and Assembly language knowledge.
Electronic engineering, physics, or a similar degree.
Role
Design and Develop precision engineered products from specification to delivery.
Meet product performance, quality, cost, and timescale requirements.