Research Associate in Formal Modelling and Verification
| Posting date: | 07 August 2025 |
|---|---|
| Salary: | Not specified |
| Additional salary information: | £38249-46735 per annum |
| Hours: | Full time |
| Closing date: | 31 August 2025 |
| Location: | Sheffield, S10 2TN |
| Company: | University of Sheffield |
| Job type: | Temporary |
| Job reference: | 1409-43574057 |
Summary
University of Sheffield
Are you interested in working for a world top 100 university, performing cutting edge research in formal verification?
Applications are invited for a postdoctoral research associate on the EPSRC-funded project “Safe and secure COncurrent programming for adVancEd aRchiTectures (COVERT)”. The post is based in Sheffield within the verification group of the School of Computer Science at
This post requires an ability to conduct high-quality research. It also requires excellent skills on developing software and/or performing formal verification. Familiarity with a proof assistant is a plus. Familiarity with the Isabelle/HOL proof assistant is a big plus.
The project aims to conduct research into the safety and security of advanced hardware architectures. These advanced architectures break assumptions that programmers have relied on, causing new safety bugs and security vulnerabilities. We will target multi-processor systems and concurrent architectures. Concurrent behaviour is notoriously difficult – incorrect synchronisation can lead to many dangerous safety and security vulnerabilities (see the Common Weaknesses database), ranging from “out-of-bounds writes” and “use-after-free” errors to “improper synchronisation and race conditions”. Further, architecture-based attacks (e.g., Spectre) show the urgency of addressing these important problems today. Even when low-level programs are well synchronised, the design of the underlying concurrent algorithms can themselves be vulnerable. In particular, well understood safety conditions such as linearizability do not guarantee security, and current approaches to addressing this issue lead to overly synchronised implementations (degrading performance). This introduces a tension between the goals of the hardware designers (who aim to maximise performance), and end users (who require trustworthy software). In the middle are developers, who are tasked with producing software that balances this tension.
In this project, you will join a team of researchers to build mechanisms for provably correct reusable abstractions that maximise flexibility in program design, allowing finetuning of both safety and security guarantees based on the architecture. Formal models for the advanced architectures will be developed using the Isabelle/HOL proof assistant, and safety and security properties and their interplay will be studied for these models. You will also have the opportunity to collaborate with leading researchers from Kent and Surrey. Finally, the project benefits from working with a number of academic, industrial and governmental partners: ARM, Galois, Defence Science and Technology (DST) and the Universities of Amsterdam, Augsburg, Melbourne and Oldenburg.
Are you interested in working for a world top 100 university, performing cutting edge research in formal verification?
Applications are invited for a postdoctoral research associate on the EPSRC-funded project “Safe and secure COncurrent programming for adVancEd aRchiTectures (COVERT)”. The post is based in Sheffield within the verification group of the School of Computer Science at
This post requires an ability to conduct high-quality research. It also requires excellent skills on developing software and/or performing formal verification. Familiarity with a proof assistant is a plus. Familiarity with the Isabelle/HOL proof assistant is a big plus.
The project aims to conduct research into the safety and security of advanced hardware architectures. These advanced architectures break assumptions that programmers have relied on, causing new safety bugs and security vulnerabilities. We will target multi-processor systems and concurrent architectures. Concurrent behaviour is notoriously difficult – incorrect synchronisation can lead to many dangerous safety and security vulnerabilities (see the Common Weaknesses database), ranging from “out-of-bounds writes” and “use-after-free” errors to “improper synchronisation and race conditions”. Further, architecture-based attacks (e.g., Spectre) show the urgency of addressing these important problems today. Even when low-level programs are well synchronised, the design of the underlying concurrent algorithms can themselves be vulnerable. In particular, well understood safety conditions such as linearizability do not guarantee security, and current approaches to addressing this issue lead to overly synchronised implementations (degrading performance). This introduces a tension between the goals of the hardware designers (who aim to maximise performance), and end users (who require trustworthy software). In the middle are developers, who are tasked with producing software that balances this tension.
In this project, you will join a team of researchers to build mechanisms for provably correct reusable abstractions that maximise flexibility in program design, allowing finetuning of both safety and security guarantees based on the architecture. Formal models for the advanced architectures will be developed using the Isabelle/HOL proof assistant, and safety and security properties and their interplay will be studied for these models. You will also have the opportunity to collaborate with leading researchers from Kent and Surrey. Finally, the project benefits from working with a number of academic, industrial and governmental partners: ARM, Galois, Defence Science and Technology (DST) and the Universities of Amsterdam, Augsburg, Melbourne and Oldenburg.